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VLSI Design

Bagad, V. S. - Personal Name;

CMOS Technology A brief history - MOS transistor, Ideal I-V characteristics, C-V characteristics, Non ideal I - V effects, DC transfer characteristics - CMOS technologies, Layout design rules, CMOS process enhancements, Technology related CAD issues, Manufacturing issues Circuit Characterization and Simulation Delay estimation, Logical effort and transistor sizing, Power dissipation, Interconnect, Design margin, Reliability, Scaling - SPICE tutorial, Device models, Device characterization, Circuit characterization, Interconnect simulation Combinational and Sequential Circuit Design Circuit families - Low power logic design - Comparison of circuit families - Sequencing static circuits, Circuit design of latches and flip flops, Static sequencing element methodology- Sequencing dynamic circuits - Synchronizers CMOS Testing Need for testing - Testers, Text fixtures and test programs - Logic verification - Silicon debug principles - Manufacturing test - Design for testability - Boundary scan Specification using Verilog HDL Basic concepts - Identifiers - Gate primitives, Gate delays, Operators, Timing controls, Procedural assignments conditional statements, Data flow and RTL, Structural gate level switch level modeling, Design hierarchies, Behavioral and RTL modeling, Test benches, Structural gate level description of decoder, Equality detector, Comparator, Priority encoder, Half adder, Full adder, Ripple carry adder, D latch and D flip flop.


Availability
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3944
Available
Detail Information
Series Title
-
Call Number
621.395
Publisher
New Delhi India : Technical Publications; FIRST edici?n (1 Enero 2011)., 2011
Collation
288 pages
Language
ISBN/ISSN
978-9350380192
Classification
621.395
Content Type
-
Media Type
-
Carrier Type
-
Edition
1st Edition
Subject(s)
Electrical Engineering
Specific Detail Info
-
Statement of Responsibility
Bagad, V. S.
Other version/related

No other version available

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